Espressif Systems /ESP32-S3 /EFUSE /RD_REPEAT_DATA2

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Interpret as RD_REPEAT_DATA2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0KEY_PURPOSE_2 0KEY_PURPOSE_3 0KEY_PURPOSE_4 0KEY_PURPOSE_5 0RPT4_RESERVED0 0 (SECURE_BOOT_EN)SECURE_BOOT_EN 0 (SECURE_BOOT_AGGRESSIVE_REVOKE)SECURE_BOOT_AGGRESSIVE_REVOKE 0 (DIS_USB_JTAG)DIS_USB_JTAG 0 (DIS_USB_DEVICE)DIS_USB_DEVICE 0 (STRAP_JTAG_SEL)STRAP_JTAG_SEL 0 (USB_PHY_SEL)USB_PHY_SEL 0POWER_GLITCH_DSENSE 0FLASH_TPUW

Description

BLOCK0 data register 3.

Fields

KEY_PURPOSE_2

Purpose of Key2.

KEY_PURPOSE_3

Purpose of Key3.

KEY_PURPOSE_4

Purpose of Key4.

KEY_PURPOSE_5

Purpose of Key5.

RPT4_RESERVED0

Reserved (used for four backups method).

SECURE_BOOT_EN

Set this bit to enable secure boot.

SECURE_BOOT_AGGRESSIVE_REVOKE

Set this bit to enable revoking aggressive secure boot.

DIS_USB_JTAG

Set this bit to disable function of usb switch to jtag in module of usb device.

DIS_USB_DEVICE

Set this bit to disable usb device.

STRAP_JTAG_SEL

Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0.

USB_PHY_SEL

This bit is used to switch internal PHY and external PHY for USB OTG and USB Device. 0: internal PHY is assigned to USB Device while external PHY is assigned to USB OTG. 1: internal PHY is assigned to USB OTG while external PHY is assigned to USB Device.

POWER_GLITCH_DSENSE

Sample delay configuration of power glitch.

FLASH_TPUW

Configures flash waiting time after power-up, in unit of ms. If the value is less than 15, the waiting time is the configurable value. Otherwise, the waiting time is twice the configurable value.

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